(1) Field of the Invention
The invention relates to the fabrication of integrated circuit devices and more particularly, to a method of cleaning a vacuum treatment apparatus to remove previously deposited polymer.
(2) Description of the Prior Art
The semiconductor manufacturing industry continues to put heavy emphasis on increasing device performance while limiting the manufacturing cost, these objectives have been successfully addressed by the trend to micro-miniaturization and by the ability to produce chips with sub-micron features.
The attainment of micro-miniaturization has been aided by the advances in specific semiconductor fabrication disciplines, most notably photolithography and dry etching. The use of more sophisticated exposure cameras, as well as the use of more sensitive photo-resist materials, have allowed sub-micron features to be routinely achieved in photo-resist layers. In addition, the development of dry etching tools and procedures have allowed the successful transfer of the sub-micron images, in an overlying photo-resist layer, to an underlying material that is used in the fabrication of semiconductors. The tools and procedures used during Reactive Ion Etching (RIE) now allow single wafer etching to be performed. This allows each single wafer to be etched individually, with end point detection used for only this single wafer. Thus wafer to wafer uniformity variations, of the layer being patterned using single layer RIE etching, is not as great a problem as encountered with batch RIE etching. Thus large volumes of wafers can be confidently processed using single wafer RIE procedures, with a decreased risk of under or over-etching due to thickness variations of the material being etched.
Dry etching, such as plasma etching and reactive ion etching, has become the technology of choice in patterning various layers that are formed over a silicon wafer as it is processed to form high density integrated circuit devices. This is because it is a process that not only can be highly selective in the materials that it etches, but because it can also perform highly anisotropic etching. This makes etching possible with nearly vertical sidewalls.
Basically, in plasma etching as used in the manufacturing of silicon integrated devices, a silicon wafer on whose surface have been deposited various layers, is positioned on a first electrode in a chamber that also includes a second electrode spaced opposite the first. As a gaseous medium that consists of one or more gasses is flowed through the chamber, an r-f voltage, which may include components of different frequencies, is applied between the two electrodes to create a discharge that ionizes the gaseous medium and that forms a plasma that etches the wafer. By appropriate choice of the gasses of the gaseous medium and the parameters of the discharge, selective and anisotropic etching is achieved.
While elaborate theories have been developed to explain the plasma process, in practice most of such processes have been developed largely by experimentation involving trial and error of the relatively poor predictability of results otherwise.
Moreover, because of the number of variables involved and because most etching processes depend critically not only on the particular materials to be etched but also on the desired selectivity and anisotropy, such experimentation can be time consuming while success often depends on chance.
A typical semiconductor-processing environment uses special procedures to clean a vacuum treatment apparatus and to thereby remove previously deposited residues that have accumulated on interior surfaces of the apparatus. There are two methods in which chamber cleaning is usually implemented. In the first, the cleaning process is carried out for a set period of time. Generally, the time is sufficiently long to include an over cleaning, by which removal of all film from the chamber walls is assured. The problem with this approach is that over cleaning reduces the productivity of the tool and can eventually cause damage to the chamber walls.
A frequently used procedure using plasma processing chambers is to dry etch a stack of thin layers which can include a photo-resist (for patterning the underlying layer), an anti-reflective coating (also known as an ARC layer, used for covering the surface of the underlying layer and typically formed over an underlying aluminum layer prior to coating this layer with photoresist), a barrier layer formed of titanium nitride, tantalum, tungsten, niobium, molybdenum, Ti/TiN or Ti/W but more preferably formed of TiN. Typical cleaning procedures are used that remove polymer with pure oxygen and further etches the dielectric with CHF.sub.3 +Ar+CF.sub.4. Such etching, however, results in residues or deposits building up on surfaces inside the plasma treatment chamber. Similar buildup of deposits occurs in plasma treatment chambers wherein deposition is carried out.
During the process of dry etching in a chlorine-based plasma or a sequence of chlorine-based and fluorine-based dry etches, residual reaction products are deposited on exposed surfaces in the plasma treatment chamber. These residues contain metals (or silicates, depending on which type of dry etch is used), chlorine, and organics (or compounds of the aforementioned materials). The surfaces that the residues adhere to include upper and lower electrode surfaces, walls of the plasma treatment chamber, clamping surfaces, and any other item that the plasma or its byproducts come in contact with. A build-up of these residues deteriorates the etch performance of the dry etch and is therefore undesirable.
Polymer (SiCl.sub.x O.sub.y) compositions can typically contain silicons, carbons, fluoride, chlorides and oxygens. However, often the term polymer is used to describe an amalgam of chemicals that have been deposited or accumulated on exposed surfaces of a plasma-processing chamber.
The materials that are deposited on the exposed surfaces of a plasma-processing chamber have a loose structure and tend to peel off and generate particles and flakes when the thickness of the deposition reaches a certain thickness. The process of cleaning and seasoning of the plasma-processing chamber therefore is of paramount importance as a factor in determining the productive use of the chamber. The examples that have been indicated above illustrate that different etching chemistries are applied using the same etching chamber at different times for different processes. It is therefore a requirement that the conditions of impurity depositions within the chamber are strictly controlled, a control that must be instituted in such a manner that wafer throughput and wafer quality are not negatively affected by the processes of chamber clean. The concept of chamber clean is basic and is aimed at removing impurities from within the chamber. The concept of chamber seasoning indicates that conditions are applied to the chamber that enhance or further prepare the process of chamber clean or that prepares the chamber for further wafer processing after the chamber clean process has been completed. Conventional processing conditions for these two steps are as follows:
Dry Clean Process:
cleaning gasses: SF.sub.6 /Cl.sub.2 /O.sub.2 PA1 wafer type: SiO.sub.2 wafer PA1 wafer quantity: 1 to 2 wafers PA1 process time: about 20 minutes. PA1 seasoning gasses: Cl.sub.2 /HBr/HeO.sub.2 PA1 wafer type: silicon wafer PA1 wafer quantity: 3 to 5 wafers PA1 process time: about 30 minutes. PA1 reduced chamber throughput due to the extended period of time that is required for the two steps of chamber clean and chamber seasoning PA1 the current process is excessively complex and requires more than one wafer, and PA1 the removal of contaminants from the exposed surfaces of the chamber is not complete or optimized due to limitations that are imposed by the seasoning process.
Seasoning process:
The above sequence of chamber clean/chamber seasoning has essentially already been highlighted and can be characterized as follows:
The invention addresses the above-indicated limitations by incorporating the dry and the seasoning processes into one processing sequence thereby reducing the impact of chamber cleaning/seasoning that is presently experienced as a result of multiple wafer processing sequences using the same chamber. As a result of the method of the invention, the chamber conditions are maintained at the desired level independent of the number of processing sequences that have been executed by the chamber.